ESSEC Participation at DAC 2026

31 July 2026

This week, Iris Jimenez represented our research group at the 62nd ACM/IEEE Design Automation Conference (DAC 2026) in Long Beach, California. DAC is one of the world's premier conferences on electronic design automation, integrated circuits, and hardware systems, bringing together leading researchers and industry experts to present the latest advances in chip design, hardware security, artificial intelligence, and system design.

During the conference, Iris presented the poster "MLSCA-Bench: A Unified Benchmarking Framework for Machine Learning-based Side-Channel Analysis." The work introduces MLSCA-Bench, an open-source benchmarking framework that enables fair, reproducible, and standardized evaluation of machine learning techniques for side-channel analysis. By providing unified datasets, preprocessing pipelines, and evaluation metrics, the framework facilitates meaningful comparisons between existing and future approaches while improving reproducibility across the research community.

In addition to presenting her work, Iris participated in the DAC Young Fellows Program, a highly competitive initiative that supports outstanding early-stage researchers through technical activities, networking opportunities, career development, and a dedicated poster session. Earlier this year, Iris was selected as one of the DAC Young Fellows 2026, recognizing her outstanding research potential in electronic design automation and hardware security.

For more information see: https://github.com/essec-lab/mlsca-bench.